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 High Common-Mode Voltage Programmable Gain Difference Amplifier
AD628
FEATURES High Common-Mode Input Voltage Range 120 V at VS = 15 V Gain Range 0.01 to 100 Operating Temperature Range -40C to 85C Supply Voltage Range Dual Supply: 2.25 V to 18 V Single Supply: 4.5 V to 36 V Excellent AC and DC Performance Offset Temperature Stability RTI 10 V/C Max Offset 1.5 V mV Max CMRR RTI 75 dB Min, DC to 500 Hz, G = +1 APPLICATIONS High Voltage Current Shunt Sensing Programmable Logic Controllers Analog Input Front End Signal Conditioning: 5 V, 10 V, 5 V, 10 V, and 4-20 mA Isolation Sensor Signal Conditioning Power Supply Monitoring Electrohydraulic Control Motor Control FUNCTIONAL BLOCK DIAGRAM
REXT2 +VS REXT1 RG
-IN
100k
10k G = +0.1 -IN A1 +IN
AD628
10k
-IN A2 +IN
OUT
+IN
100k 10k
-VS
VREF
CFILT

GENERAL DESCRIPTION
The AD628 is a precision difference amplifier that combines excellent dc performance with high common-mode rejection over a wide range of frequencies. When used to scale high voltages, it allows simple conversion of standard control voltages or currents for use with single-supply A/D converters. A wideband feedback loop minimizes distortion effects due to capacitor charging of sigma-delta A/D converters. A reference pin (VREF) provides a dc offset for converting bipolar to single-sided signals. The AD628 converts +5 V, +10 V, 5 V, 10 V, and 4-20 mA input signals to a single-ended output within the input range of single-supply A/D converters. The AD628 has an input common-mode and differential mode operating range of 120 V. The high common-mode input impedance makes the device well suited for high voltage measurements across a shunt resistor. The buffer amplifier inverting input is available for making a remote Kelvin connection.
Figure 1. CMRR vs. Frequency of the AD628
A precision 10 k resistor connected to an external pin is provided for either a low-pass filter or to attenuate large differential input signals. A single capacitor implements a low-pass filter. The AD628 operates from single and dual supplies and is available in an 8-lead SOIC package. Contact the factory for availability in an MSOP package. It operates over the standard industrial temperature range of -40C to +85C.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P Box 9106, Norwood, MA 02062-9106, U.S.A. .O. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2003 Analog Devices, Inc. All rights reserved.
AD628-SPECIFICATIONS (T = 25C, V = 15 V, R = 2 k, R
A S L
EXT1
= 10 k, REXT2 = , unless otherwise noted.)
Min Typ Max Unit V/V V/V ppm/C mV V/C dB dB (V/V)/C dB V V kHz kHz s V/s nV/ Hz V p-p V/V % ppm/C ppm ppm mV V/C k k dB (V/V)/C dB k % V/V ppm mV V/C V V nA nA dB dB V mA C
Parameter DIFF-AMP + OUTPUT AMP Gain Equation Gain Range Gain Drift Offset Voltage vs. Temperature CMRR Drift (RTI) PSRR (RTI) Input Voltage Range Common-Mode Differential Dynamic Response Small Signal BW -3 dB Full Power Bandwidth Settling Time Slew Rate Noise (RTI) Spectral Density DIFF-AMP Gain Error vs. Temperature Nonlinearity vs. Temperature Offset Voltage (RTI) vs. Temperature Input Impedance Differential Common-Mode CMRR (RTI)
Conditions G = 0.1[REXT4/(REXT4 + 10 k)] (1+ REXT1/REXT2) )] Figure 4
0.01* -1.5 4
100 5 +1.5 8 4 120 120
500 Hz VS = 10 V to 18 V
75 75 77 1 94
G = 0.1 G = 0.1, to 0.01%, 100 V Step
600 5 40 0.3 300 15 0.1 +0.01 3 -1.5 220 55
1 kHz 0.1 Hz to 10 Hz
-0.1
+0.1 5 5 10 +1.5 8
Over Temperature 500 Hz Output Resistance Error OUTPUT AMPLIFIER Gain Equation Nonlinearity Offset Voltage vs. Temperature Output Voltage Swing Bias Current Offset Current CMRR Open-Loop Gain POWER SUPPLY Operating Range Quiescent Current TEMPERATURE RANGE
Specifications subject to change without notice.
75 1 75 -0.1
4 10 +0.1
G = 1, VOUT = 10 V RL = 2 k RL = 10 k VCM = 13 V VOUT = 13 V
G = (1 + REXT1/REXT2) 0.5 -0.15 +0.15 0.6 -13.8 +13.6 -14.2 +14.1 1.5 3 0.2 0.5 130 130 2.25 -40 18 1.6 +85
-2-
REV. A
SPECIFICATIONS (T = 25C, V = 5 V, R = 2 k, R
A S L
AD628
= 10 k, REXT2 = , unless otherwise noted.)
Min Typ Max Unit V/V V/V mV V/C dB dB (V/V)/C dB V V kHz kHz s V/s nV/ Hz V p-p V/V % ppm ppm mV V/C k k dB (V/V)/C dB k % V/V ppm mV V/C V V nA nA dB dB V mA C
EXT1
Parameter DIFF-AMP + OUTPUT AMP Gain Equation Gain Range Offset Voltage vs. Temperature CMRR Drift (RTI) PSRR (RTI) Input Voltage Range Common Mode* Differential Dynamic Response Small Signal BW -3 dB Full Power Bandwidth Settling Time Slew Rate Noise (RTI) Spectral Density DIFF-AMP Gain Error Nonlinearity vs. Temperature Offset Voltage (RTI) vs. Temperature Input Impedance Differential Common-Mode CMRR (RTI)
Conditions G = 0.1[REXT4/(REXT4 + 10 k)] (1+ REXT1/REXT2) )] Figure 4 VOCM = 2.25 V 500 Hz VS = 4.5 V to 10 V VREF = 2.5 V
0.01* -3.0 6 75 75 77 -12 15 440 30 15 0.3 350 15 0.1 +0.01 3 1 94
100 +3.0 15 4 +17
G = 0.1 G = 0.1, to 0.01%, 30 V Step 1 kHz 0.1 Hz to 10 Hz
-0.1
+0.1 3 10 2.5 10
220 55 75 Over Temperature 500 Hz 1 75 10 -0.1 +0.1 4
Output Resistance Error OUTPUT AMPLIFIER Gain Equation Nonlinearity Offset Voltage vs. Temperature Voltage Swing Bias Current Offset Current CMRR Open-Loop Gain POWER SUPPLY Operating Range Quiescent Current TEMPERATURE RANGE
*Greater values of voltage are possible with greater or lesser values of VREF. Specifications subject to change without notice.
G = 1, VOUT = 1 V to 4 V RL = 2 k RL = 10 k VCM = 1 V to 4 V VOUT = 1 V to 4 V
G = (1 + REXT1/REXT2) 0.5 0.15 0.6 1 4 0.9 4.1 1.5 3 0.2 0.5 130 130 2.25 -40 +36 1.6 +85
REV. A
-3-
AD628
ABSOLUTE MAXIMUM RATINGS*
1.5 TJ = 150C
POWER DISSIPATION - W
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Internal Power Dissipation . . . . . . . . . . . . . . . . . . . See Figure 2 Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . 120 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 120 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . Indefinite Storage Temperature . . . . . . . . . . . . . . . . . . . . -65C to +125C Operating Temperature Range . . . . . . . . . . . . . -40C to +85C Lead Temperature Range (10 sec Soldering) . . . . . . . . . . .300C
*Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
8-LEAD SOIC PACKAGE 1.0
0.5
0 -50 -40 -30 -20 -10
0
10
20
30
40
50
60
70
80 90
AMBIENT TEMPERATURE - C
Figure 2. Maximum Power Dissipation vs. Temperature
ORDERING GUIDE
Model
Temperature Range
Package Description 8-Lead SOIC 8-Lead MSOP Evaluation Board
Package Option R-8 RM-8
AD628AR -40C to +85C AD628ARM -40C to +85C (Contact Factory) AD628AR-E VAL
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD628 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
+IN 1
8
PIN FUNCTION DESCRIPTIONS Pin No. 1 2 3 4 5 6 7 8 Mnemonic +IN -VS V REF CFILT OUT RG +VS -IN Function Noninverting Input Negative Supply Voltage Reference Voltage Input Filter Capacitor Connection Amplifier Output Output Amplifier Inverting Input Positive Supply Voltage Inverting Input
-IN
7 +VS AD628 -VS 2 TOP VIEW VREF 3 (Not to Scale) 6 RG
CFILT 4
5
OUT
-4-
REV. A
Typical Performance Characteristics-AD628








TPC 1. Typical Distribution of Input Offset Voltage, VS = 15 V, SOIC Package

TPC 4. PSRR vs. Frequency, Single and Dual Supplies







TPC 2. Typical Distribution of Common-Mode Rejection, SOIC Package
TPC 5. Voltage Noise Spectral Density, RTI, VS = 15 V





TPC 3. CMRR vs. Frequency
TPC 6. Voltage Noise Spectral Density, RTI, VS = 2.5 V
REV. A
-5-
AD628










TPC 7. 0.1 Hz to 10 Hz Voltage Noise, RTI

TPC 10. Typical Distribution of +1 Gain Error













TPC 8. Small Signal Frequency Response, VOUT = 200 mV p-p, G = +0.1, +1, +10, and +100

TPC 11. Common-Mode Operating Range vs. Power Supply Voltage for Three Temperatures














TPC 9. Large Signal Frequency Response, VOUT = 20 V p-p, G = +0.1, +1, +10, and +100
TPC 12. Normalized Gain Error vs. VOUT, VS = 15 V
-6-
REV. A
AD628










TPC 13. Normalized Gain Error vs. VOUT, VS = 2.5 V
TPC 16. Small Signal Pulse Response, RL = 2 k, k CL = 0 pF Top: Input, Bottom: Output ,







TPC 14. Bias Current vs. Temperature, Buffer
TPC 17. Small Signal Pulse Response, RL = 2 k, k CL = 1000 pF Top: Input, Bottom: Output ,









TPC 15. Output Voltage Operating Range vs. Output Current
TPC 18. Large Signal Pulse Response, RL = 2 k, k CL = 1000 pF Top: Input, Bottom: Output ,
REV. A
-7-
AD628


TPC 19. Settling Time to 0.01%, 0 V to +10 V Step
TPC 20. Settling Time to 0.01%, 0 V to -10 V Step
-8-
REV. A
AD628 Test Circuits
HP3589A SPECTRUM ANALYZER HP3561A SPECTRUM ANALYZER 100 10k
+VS
AD628
-IN 100k -IN G = +0.1 +IN 10k 10k +IN -IN OUT - AD829 + G = +100 +IN 100k FET PROBE -IN 100k
+VS
AD628
10k 10k
RG -IN +IN OUT
+IN 100k
-IN G = +0.1 +IN 10k CFILT
10k VREF -VS CFILT RG VREF -VS
- AD707 +
Test Circuit 3. Noise Tests
Test Circuit 1. CMRR vs. Frequency
SCOPE
+VS 1 VAC
AD628
-IN 100k -IN G = +0.1 +IN 10k 10k +IN -IN OUT
+15V G = +100 20 + AD829 -
+IN 100k
G = +100
10k
VREF -VS
CFILT
RG
Test Circuit 2. PSRR vs. Frequency
REV. A
-9-
AD628
APPLICATIONS Gain Adjustment
-IN 100k 10k G = +0.1 -IN A1 +IN +IN 100k 10k 10k -IN A2 +IN OUT
The AD628 system gain is provided by an architecture consisting of two amplifiers. The gain of the input stage is fixed at 0.1; the output buffer is user adjustable as follows: G = 1+ The system gain is then: REXT1 REXT 2
VREF
R G = 0.1 x 1 + EXT1 REXT 2 At 2 nA maximum, the input bias current of the buffer amplifier is very low and any offset voltage induced at the buffer amplifier by its bias current may be neglected (2 nA 10 k = 20 V). However, to absolutely minimize bias current effects, REXT1 and REXT2 may be selected so that their parallel combination is 10 k. If practical resistor values force the parallel combination of REXT1 and REXT2 below 10 k, a series resistor (REXT3) may be , added to make up for the difference. Table I lists several values of gain and corresponding resistor values.
* * * * Voltage Level Conversion * * * * * * * *
Figure 3. Simplified Schematic THEORY OF OPERATION
The AD628 is a high common-mode voltage difference amplifier, combined with a user configurable output amplifier (see Figures 3 and 4). Differential mode voltages in excess of 150 V are accurately scaled by a precision 11:1 voltage divider at the input. A reference voltage input is available to the user at Pin 3. The output common-mode voltage of the difference amplifier will be whatever voltage is applied to the reference pin. If the uncommitted amplifier is configured for gain, connecting Pin 3 to one end of the external gain resistor establishes the output common-mode voltage at Pin 5. The output of the difference amplifier is internally connected to a 10 k resistor trimmed to better than 0.1% absolute accuracy. The resistor is connected to the noninverting input of the output amplifier and is accessible to the user at Pin 4. A capacitor may be connected to implement a low-pass filter, a resistor to further reduce the output voltage, or a clamp circuit to limit the output swing. The uncommitted amplifier is a high open-loop gain, low offset, low drift op amp, with its noninverting input connected to the internal 10 k resistor. Both inputs are accessible to the user. Careful layout design has resulted in exceptional common-mode rejection at higher frequencies. The inputs are connected to Pin 1 and Pin 8, which are adjacent to the power Pin 2 and Pin 7. Since the power pins are at ac ground, input impedance balance and, therefore, common-mode rejection are preserved at higher frequencies.
REXT2 REXT1 REXT3 +VS RG
-IN
100k
10k G = +0.1 -IN A1 +IN
AD628
10k
-IN A2 +IN
OUT
Industrial signal conditioning and control applications typically require connections between remote sensors or amplifiers and centrally located control modules. Signal conditioners provide output voltages up to 10 V full scale; however, A/D converters or microprocessors operating on single 3.3 V to 5 V logic supplies are becoming the norm. Thus, the controller voltages require further reduction in amplitude and reference. Furthermore, voltage potentials between locations are seldom compatible, and power line peaks and surges can generate destructive energy between utility grids. The AD628 is an ideal solution to both problems. It attenuates otherwise destructive signal voltage peaks and surges by a factor of 10 and shifts the differential input signal to the desired output voltage. Conversion from voltage-driven or current-loop systems is easily accommodated using the circuit in Figure 5. This shows a circuit for converting inputs of various polarities and amplitudes to the input of a single-supply A/D converter. -10- REV. A
+IN
100k 10k
-VS
VREF CFILT REXT4
Figure 4. Circuit Connections
AD628
Note that the common-mode output voltage can be adjusted by connecting Pin 3 and the lower end of the 10 k resistor to the desired voltage. The output common-mode voltage will be the same as the reference voltage. The design of such an application may be done in a few simple steps: 1. Determine the required gain. For example, if the input voltage must be transformed from 10 V to 0 V to +5 V, the gain is 5/20 or 0.25. 2. Determine if the circuit common-mode voltage must be changed. An AD7715-5 A/D converter is illustrated for this example. When operating from a 5 V supply, the commonmode voltage of the AD7715 is 1/2 the supply or 2.5 V. If the AD628 reference pin and the lower terminal of the 10 k resistor are connected to a 2.5 V voltage source, the output common-mode voltage will be 2.5 V. Table II shows resistor and reference values for commonly used single-supply converter voltages.

AD7715-5 SERIAL CLOCK CLOCK NC +VS +5V SCLK MCLK IN MCLK OUT CS RESET AVDD +IN 10 A1 +IN +IN 100k 10k VREF -VS RG 10k (SEE TABLE II) AD680 +5V A2 -IN REXT1 (SEE TABLE II) AIN(-) REF IN(+) OUT AIN(+) REF IN(-) DGND DVDD DIN DOUT DRDY AGND +5V
AD628
-IN (SEE TABLE II) VIN 100k 10k 10k
-IN
+2.5V
CFILT
Figure 5. Level Shifter
REV. A
-11-
AD628
Current Loop Receiver
Analog data transmitted on 4-20 mA current loop may be detected with the receiver shown in Figure 6. The AD628 is an ideal choice for such a function, since the current loop must be driven with a compliance voltage sufficient to stabilize
+15V +VS
the loop, and the resultant common-mode voltage will often exceed commonly used supply voltages. Note that with large shunt values a resistance of equal value must be inserted in series with the inverting input to compensate for an error at the noninverting input.
AD628
250 -IN 250 100k 10k A1 10k +IN -IN 10 +IN 100k +IN 10k 4-20mA SOURCE VREF -VS -15V CFILT REXT1 100k -IN A2 OUT 0V TO 5V TO A/D CONVERTER
REXT2 11k
2.5V REF
Figure 6. Level Shifter for 4-20 mA Current Loop Monitoring Battery Voltages
Figure 7 illustrates how the AD628 may be used to monitor a battery charger. Voltages approximately eight times the power supply voltage may be applied to the input with no damage.
5V +VS nVBAT(V) -IN 100k 10k A1
The resistor divider action is well suited for the measurement of many power supply applications, such as those found in battery chargers or similar equipment.
10k +IN A2 -IN OUT
0V TO 5V TO A/D CONVERTER REXT1 10k
CHARGING CIRCUIT
+1.5V BATTERY +IN
-IN 10 +IN 100k
AD628
10k
OTHER BATTERIES IN CHARGING CIRCUIT
-VS
VREF
Figure 7. A Battery Voltage Monitor
-12-
REV. A
AD628
Filter Capacitor Values Kelvin Connection
A capacitor may be connected to Pin 4 to implement a low-pass filter. The capacitor value will be: C = 15.9 ft (m ) F where ft is the desired 3 dB filter frequency. Table III shows several frequencies and their closest standard capacitor values.
In certain applications it may desirable to connect the inverting input of an amplifier to a remote reference point. This eliminates errors resulting in circuit losses in interconnecting wiring. The AD628 is particularly suited for this type of connection (see Figure 8).
5V +VS -IN 100k 10k A1 -IN 10 +IN 100k +IN 10k 250 10k +IN A2 -IN OUT CIRCUIT LOSS LOAD
Table III. Capacitor Values for Various Filter Frequencies Frequency (Hz) 10 50 60 100 400 1k 5k 10 k Capacitor Value (F) 1.5 0.33 0.27 0.15 0.039 0.015 0.0033 0.0015
AD628
-VS
VREF VS /2
Figure 8. Kelvin Connection
REV. A
-13-
AD628
OUTLINE DIMENSIONS 8-Lead MSOP Package [MSOP] (RM-8)
Dimensions shown in millimeters
3.00 BSC
8 5
3.00 BSC
1 4
4.90 BSC
PIN 1 0.65 BSC 0.15 0.00 0.38 0.22 COPLANARITY 0.10 1.10 MAX 0.23 0.08 SEATING PLANE 8 0 0.80 0.40
COMPLIANT TO JEDEC STANDARDS MO-187AA
8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497)
8 1 5 4
6.20 (0.2440) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY SEATING 0.10 PLANE
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) 45 0.25 (0.0099)
0.51 (0.0201) 0.33 (0.0130)
8 0.25 (0.0098) 0 1.27 (0.0500) 0.41 (0.0160) 0.19 (0.0075)
COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
-14-
REV. A
AD628 Revision History
Location 1/03--Data Sheet changed from REV. 0 to REV. A. Page
Change to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
REV. A
-15-
-16-
C02992-0-1/03(A)
PRINTED IN U.S.A.


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